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Dr. Bhawna Rawat

Assistant Professor
Ph.D. (Submitted - ECE) from Delhi Technological University, M.Tech. (VLSI Design, ECE) from Indira Gandhi Delhi Technological University for Women, B.Tech (ECE) from Shiv Nadar University.

Area of Specialization

Low Power Digital Circuits, Analog Mixed Signal Circuits, In-memory and Near-memory Computation.

Ms. Bhawna Rawat is currently working as an Assistant Professor in Vivekananda Institute of Professional Studies-Technical Campus, School of Engineering & Technology. She has submitted her PhD thesis in the area of ECE (VLSI Design) at Delhi Technological University. She obtained her master’s degree in ECE (VLSI Design) from Indira Gandhi Delhi Technical University for Women. She completed her bachelor’s degree in Electronics and Communication Engineering from Shiv Nadar University. She has multiple publications in the area of memory design, low power digital circuits, data envelopment analysis and sense amplifier design.

SCI/SCIE Indexed Journal

  • V. Singhal, B. Rawat, P. Mittal and B. Kumar, “A single ended single port configuration based 9T SRAM cell for stability enhancement” Physica Scripta ((Accepted) I.F. 2.9, IOP, SCIE Indexed).
  • B. Rawat and P. Mittal “A single–Port to Dual-Port Reconfigurable 7T SRAM Bit Cell for High Speed, Power Saving and Low Voltage Application” ACM Transaction on Design Automation of Electronic Systems ((Just Accepted) I.F. 1.4, ACM, SCIE Indexed).
  • B. Rawat and P. Mittal, “A Latch Based Sense Amplifier with Improved performance for single ended SRAM applications” Physica Scripta, vol. 98, no. 6, pp. 065025, 2023. (I.F. 2.9, IOP, SCIE Indexed). DOI - 10.1088/1402-4896/acd6c2.
  • B. Rawat and Poornima Mittal, “A low power single bit-line configuration dependent 7T SRAM bit cell with process variation tolerant enhanced read performance” Analog integrated Circuits and Signal Processing. vol. 115, pp. 77, 2023. (I.F. 1.4, Springer, SCIE Indexed). DOI - https://doi.org/10.1007/s10470-023-02147-x.
  • B. Rawat and Poornima Mittal, “A switching NMOS based single ended sense amplifier for high density SRAM Application”, ACM Transaction on Design Automation of Electronic Systems, vol. 28, no. 3, pp.1-14, 2023. (I.F. 1.4, ACM, SCIE Indexed). DOI - https://doi.org/10.1145/3576198.
  • B. Rawat, and P. Mittal, A comprehensive analysis of different 7T SRAM topologies to design a 1R1W bit interleaving enabled and half select free cell for 32 nm technology node, Proceedings of Royal Society A: Mathematical, Physical and Engineering Science, vol. 478, no. 2259, 20210745, March 2022. (I.F. 3.5, Royal Society, SCIE Indexed). DOI - https://doi.org/10.1098/rspa.2021.0745.
  • P. Mittal, B. Rawat, and N. Kumar, Tetra-variate scrutiny of diverse multiplexer techniques for designing a barrel shifter for low power digital circuits, Microprocessors and Microsystems, vol. 90, pp. 104491, 2022. (I.F. 2.6, Elsevier, SCIE Indexed). DOI - https://doi.org/10.1016/j.micpro.2022.104491.
  • B. Rawat, and P. Mittal, “A reliable and temperature variation tolerant 7T SRAM cell with single bitline configuration for low voltage application,” Circuit, Systems and Signal Processing, vol. 41, pp. 2779, 2022. (I.F. 2.3, Springer, SCIE Indexed). DOI - https://doi.org/10.1007/s00034-021-01912-5.
  • B. Rawat, and P. Mittal, “A 32 nm single ended single port 7T SRAM for low power utilization,” Semiconductor Science and Technology, vol. 36, pp. 095006, 2021. (I.F. 1.9, IOP, SCIE Indexed). DOI - 10.1088/1361-6641/ac07c8.
  • . Rawat and P. Mittal, “Single Bit Line Accessed High Performance Ultra Low Voltage operating 7-T SRAM Cell with Improved Read Stability,” International Journal of Circuit Theory, and Application, vol. 49, no. 5, pp. 1435, 2021. (I.F. 2.3, Wiley, SCIE Indexed). DOI - https://doi.org/10.1002/cta.2960.

Scopus Indexed Journal

  • D. Dutt, P. Mittal, B. Rawat, B. Kumar, Design and Performance Analysis of High Performance Low Power Voltage Mode Sense Amplifier for Static RAM, Advances in Electrical and Electronics Engineering, vol. 20, no. 33, pp. 285-293, 2022. DOI: 10.15598/aeee.v20i3.4373
  • N. Kumar, P. Mittal, B. Rawat, M. Mittal, Dynamic Power Consumption and Delay Analysis for Ultra-Low Power 2 to 1 Multiplexer Designs, Advances in Electrical and Electronics Engineering, vol. 19, no. 2, pp. 145-154, 2021. DOI: 10.15598/aeee.v19i2.3821

Scopus Indexed International Conferences

  • P. Srivastava, B. Rawat, and P. Mittal, “Comparative Analysis of various SRAM bit cells for 32nm technology node”, 4th International Conference on Data Science and Applications (ICDSA 2023), organized by MNIT Jaipur on July 14-15, 2023.
  • B. Rawat, and P. Mittal, “A Comprehensive Review to Investigate the Effect of Read Port Topology on the Performance of Different 7T SRAM cells”, 2nd International Conference Women Researchers In Electronics And Computing, Apr 21-23, 2023.
  • B. Rawat, and P. Mittal, “Impact of high performance transistor on performance of static random access memory for low voltage applications,” 2nd International Conference on Computational Electronics for Wireless Communication, Jun 09-10, 2022.
  • B. Rawat, and P. Mittal, “Investigating the Impact of Schmitt Trigger on SRAM cells at 32 nm Technology node for low voltage applications,” Advances in VLSI and embedded systems (AVES-2021), LNEE, vol. 962, pp. 53-63, Dec 18-19, 2021.
  • Siddarth, Siddhant Paper, B. Rawat and P. Mittal, “A comparative performance analysis of varied 10T SRAM cell topologies at 32 nm technology node,” International Conference on Modelling, Simulation and Optimization 2021 (CoMSO-2021), Dec 16-18, 2021.
  • M. Chaturvedi, M. Garg, B. Rawat and P. Mittal, “A read stability enhanced, temperature tolerant 8T SRAM cell,” 2021 International Conference on Simulation, Automation, and Smart Manufacturing (SASM-2021), 20-21 Aug, 2021, IEEE.
  • B. Rawat and P. Mittal, “Analysis of varied architectural configuration for 7T SRAM bit cell,” 4th International Conference on Recent Trend in Communication & Electronics (ICCE-2020), 28-29 Nov, 2020, Proceedings Published by Taylor and Francis.
  • K. Gupta, B. Rawat and N. Goel, “Low Voltage 7T SRAM cell in 32nm CMOS Technology Node,” IEEE International Conference on Computing, Power and Communication Technologies (GUCON), IEEE, 2018.
  • S. Singhal, B. Rawat and H. Gupta, "Comprehensive evaluation of renewable and conventional electric utility of India under non-cooperative and cooperative environment,” ICEPE Meghalya, 2018.
  • S. Singhal, S. Jain, N. B, B. Rawat and H. Gupta, "Performance evaluation of Uttarakhand Electric Utility Data using Slack Based Measure and Two-Stage DEA Modelling", Electrical Power and Energy Systems, IEEE, Bhopal, India, 2017, pp. 27-34.

Book Chapter

Patent Published

Conference